CY14C512J nvsram equivalent, 512-kbit (64 k x 8) serial (i2c) nvsram.
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512-Kbit nonvolatile static random access memory (nvSRAM)
* Internally organized as 64 K × 8
* STORE to QuantumTrap nonvolatile elements initiated a.
Clock. Runs at speeds up to a maximum of fSCL. I/O. Input/Output of data through I2C interface. Write Protect. Protects the memory from all writes. This pin is internally pulled LOW and hence can be left open if not connected. Slave Address. Defines .
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